2022

  • V. Chandra, Y. Chen, S. Yoo, "Introduction to the Special Section on Energy-Efficient AI Chips,” ACM Transactions on Design Automation of Electronic Systems, Vol. 27, Issue 5, Sep. 2022.

2021

  • T. Lee, S. Yoo, "Augmenting Few-Shot Learning with Supervised Contrastive Learning," IEEE Access, April 2021. (SCIE)

2020

  • S. Cho, H. Choi, E. Park, H. Shin and S. Yoo, “McDRAM v2: In-Dynamic Random Access Memory Systolic Array Accelerator to Address the Large Model Problem in Deep Neural Networks on the Edge,” IEEE Access, July 2020. (SCIE)
  • H. Choi, D. Hong, J. Lee, S. Yoo, “Reducing DRAM Refresh Power Consumption by Runtime Profiling of Retention Time and Dual-row Activation,” Microprocessors and Microsystems, Feb. 2020. (SCIE)

2019

  • W. Kang and S. Yoo, “Q-Value Prediction for Reinforcement Learning Assisted Garbage Collection to Reduce Long Tail Latency in SSD,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Dec. 2019. (SCI)
  • D. Lee, D. Kim, S. Yoo, “A wide range gate data acquisition for diagnosing coronary artery disease,” Echocardiography - A Journal of Cardiovascular Ultrasound and Allied Techniques, Aug. 2019. (SCIE)

2018

  • H. Shin, D. Kim, E. Park, S. Park, Y. Park, S. Yoo, “McDRAM: Low Latency and Energy-Efficient Matrix Computations in DRAM,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Oct. 2018. (SCI)
  • M. Son, J. Ahn, S. Yoo, "Non-Volatile Write Buffer-based Journaling Bypass for Storage Write Reduction in Mobile Devices," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems., Sep. 2018. (SCI)
  • D. Kim, J. Ahn, S. Yoo, "ZeNA: Zero-Aware Neural Network Accelerator," Special Issue on Hardware Accelerators for Data Centers, IEEE Design & Test., Feb. 2018. (SCIE)

2017

  • W. Kang, D. Shin, S. Yoo, "Reinforcement Learning-Assisted Garbage Collection to Mitigate Long Tail Latency Problem," ACM Transactions on Embedded Computing Systems (TECS), Oct. 2017. (SCIE)

2016

  • J. Ahn, S. Yoo, K. Choi, "AIM: Energy-Efficient Aggregation inside the Memory Hierarchy," ACM Transactions on Architecture and Code Optimization, Oct. 2016. (SCIE)
  • S. Lee, T. Lee, H. Park, J. Ahn, S. Yoo, Y. Won, S. Lee, "Differential Write-Conscious Software Design on Phase-Change Memory: An SQLite Case Study," ACM Transactions on Design Automation of Electronic Systems, July, 2016. (SCIE)
  • J. Ahn, S. Yoo, K. Choi, "Prediction Hybrid Cache: An Energy-Efficient STT-RAM Cache Architecture," IEEE Transactions on Computers, March 2016. (SCI)
  • Z. Sun, X. Bi, W. Wu, S. Yoo, H. Li, "Array Organization and Data Management Exploration in Racetrack Memory," IEEE Transactions on Computers, March 2016. (SCI)
  • C. Hahm, S. Lee, T. Lee, S. Yoo, "Memory Access Scheduling for a Smart TV," IEEE Transactions on Circuits and Systems for Video Technology, Feb. 2016. (SCIE)
  • J. Ahn, S. Yoo, K. Choi, "Low-Power Hybrid Memory Cubes with Link Power Management and Two-Level Prefetching," IEEE Transactions on Very Large Scale Integration Systems (VLSI), Feb. 2016. (SCIE)
  • Y. Kim, S. Yoo, S. Lee, "Improving Write Performance by Controlling Target Resistance Distributions in MLC PRAM," ACM Transactions on Design Automation of Electronic Systems, Jan. 2016. (SCIE)

2015

  • J. Park, S. Yoo, S. Lee, "Time Slot Assignment for Convergecast in Wireless Sensor Networks," Journal of Parallel and Distributed Computing, Sept. 2015. (SCI)
  • J. Yun, S. Yoo, S. Lee, "Dynamic Wear Leveling for Phase-Change Memories with Endurance Variations," IEEE Transactions on Very Large Scale Integration Systems (VLSI), Sept. 2015. (SCIE)
  • D. Kim, S. Yoo, S. Lee, "Hybrid Main Memory for High Bandwidth Multi-Core System," IEEE Transactions on Multi-Scale Computing Systems, July-September 2015. (SCIE)
  • C. Kim, C. Park, S. Yoo, S. Lee, "Extending Lifetime of Flash Memory Using Strong Error Correction Coding," IEEE Transactions on Consumer Electronics, May 2015. (SCI)

2014

  • B. Jeon, G. Park , J. Lee , S. Yoo , H. Jeong, "A Memory-Efficient Architecture of Full HD Around View Monitor systems," IEEE Transactions on Intelligent Transportation Systems, June 2014. (SCI)
  • S. Park, D. Kim, K. Bang, H. Lee, S. Yoo, and E. Chung, "An Adaptive Idle-Time Exploiting Method for Low Latency NAND Flash-Based Storage Devices," IEEE Transactions on Computers, May 2014. (SCI)

2013

  • D. Kim, S. Yoo, and S. Lee, "A Network Congestion-Aware Memory Subsystem for Manycore," ACM Transactions on Embedded Systems (TECS), June 2013. (SCIE)

2012

  • J. Park, S. Lee and S. Yoo, "Optimal stop points for data gathering in sensor networks with mobile sinks," Wireless Sensor Network (ISSN 1945-3078), Science Research Publications, Vol. 4, No. 1, pp. 8-17, Jan. 2012.
  • Y. Choi, S. Yoo, S. Lee, J. Ahn, and K. Lee, "MAEPER: Matching Access and Error Patterns with Error-free Resource for Low Vcc L1 Cache," IEEE Transactions on Very Large Scale Integration Systems (VLSI), Aug. 2012. (SCIE)
  • W. Jang, S. Lee and S. Yoo, "Optimal Wake-up Scheduling of Data Gathering Trees for Wireless Sensor Networks," Journal of Parallel and Distributed Computing (JDPC), April, 2012. (SCI)
  • H. Park, S. Yoo, and S. Lee, "A Multi-Step Tag Comparison Method for Low Power L2 Cache," vol. 31, issue 4, pp. 559-572, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (CAD), April 2012. (SCI)
  • S. Kang, S. Cho, S. Yoo and Y. Kim, "Scene Change Detection Using Multiple Histograms for Motion-Compensated Frame Rate Up-Conversion," vol. 8, issue 3, pp. 121-126, IEEE Journal of Display Technology, March, 2012. (SCIE)

2011

  • S. Kwon, S. Yoo, and S. Lee, "Optimizing Video Application Design for Phase-Change RAM-based Main Memory," IEEE Transactions on VLSI Systems, Oct. 2011. (SCIE)
  • K. Kang, J. Kim, S. Yoo, and C. Kyung, "A Runtime Method for Power Management in 3D Multi-Core Architectures under Peak Power and Temperature Constraints," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (CAD), May 2011. (SCI)
  • J. Yoo, S. Yoo, and K. Choi, "Active Memory Processor for Network-on-Chip Based Architecture," IEEE Transactions on Computers, March 2011. (SCI)
  • J. Kim, S. Yoo, and C. Kyung, "Program Phase-aware Dynamic Voltage Scaling under Variable Computational Workload and Memory Stall Environment," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (CAD), Jan. 2011. (SCI)

2010

  • S. Kang, S. Yoo, and Y. Kim, "Dual Motion Estimation for Frame Rate Up-Conversion," IEEE Transactions on Circuits and Systems for Video Technology, Dec. 2010. (SCI)
  • U. Jang, S. Lee, J. Park, S. Yoo, "Fault-Tolerant WSN Time Synchronization," Wireless Sensor Network (WSN), Oct. 2010.
  • K. Kang, J. Kim, S. Yoo, and C. Kyung, "Temperature-Aware Integrated DVFS and Power Gating for Executing Tasks with Runtime Distribution," IEEE Transactions on Computer-Aided Design, Aug. 2010. (SCI)

2009

  • J. Kim, S. Yoo and C. Kyung, "DVFS Algorithm Exploiting Correlation in Runtime Distribution," Journal of Semiconductor Technology and Science (JSTS), Vol.9, No.2, June 2009. (SCIE)
  • M. Jeon, S. Yoo and E. Chung, "Topology Synthesis of Cascaded Crossbar Switches," IEEE Transactions on Computer-Aided Design, vol. 28, pp. 926-930, May 2009. (SCI)
  • J. Kim, S. Oh, S. Yoo and C. Kyung, "An Analytical Dynamic Scaling of Supply Voltage and Body Bias Based on Parallelism-aware Workload and Runtime Distribution", IEEE Transactions on Computer-Aided Design, vol. 28, 568—581, April 2009. (SCI)
  • J. Yoo, S. Yoo, and K. Choi, "Topology/Floorplan/Pipeline Co-Design of Cascaded Crossbar Bus," IEEE Transactions on VLSI Systems, vol. 17, pp. 1034—1047, July 2009. (SCIE)

2007

  • J. Jung, S. Yoo, K. Choi, "Fast Cycle-approximate MPSoC Simulation based on Synchronization Time-point Prediction," Design Automation for Embedded Systems, vol. 11, no. 4, pp. 223-247, Kluwer Academic Publishers, 2007. (SCIE)
  • Y. Cho, N. Zergainoh, S. Yoo, K. Choi, A. Jerraya, "Scheduling with Accurate Communication Delay Model and Scheduler Implementation for Multiprocessor System-on-Chip," Design Automation for Embedded Systems, vol. 11, no. 2-3, pp. 167-191, Kluwer Academic Publishers, 2007. (SCIE)

~2006

  • I. Bacivarov, A. Bouchhima, S. Yoo, and A. A. Jerraya, "Chronosym: a new approach for fast and accurate SoC cosimulation," International Journal of Embedded Systems, vol.1, no.1-2, pp. 103-111, Jan. 2006.
  • H. Kim, S. Kim, I. Lee, S. Yoo, E. Chung, K. Choi, J. Kong, and S. Eo, "An Industrial Case Study of the ARM926EJ-S Power Modeling," Journal of Semiconductor Technology and Science, vol. 5, no. 4, pp. 221-228, Dec. 2005.
  • S. Yoo and A. Jerraya, "Hardware/Software Co-simulation and Interfaces," IEE Proceedings Computers & Digital Techniques, vol. 152, issue 3, pp. 369-379, May 2005. (SCIE)
  • Y. Ahn, D. Kim, S. Lee, S. Park, S. Yoo, K. Choi, S. Chae, "An Efficient Simulation Environment and Simulation Techniques for Bluetooth Device Design," Design Automation for Embedded Systems, vol. 8, issue 2-3, pp. 119-138, Kluwer Academic Publishers, 2003. (SCIE)
  • A.A. Jerraya, A. Baghdadi, W. Cesario, L. Gauthier, D. Lyonnard, G. Nicolescu, Y. Paviot, and S. Yoo, "Application-specific multiprocessor Systems-on-Chip," Microelectronics Journal, Elsevier Science Ltd., 2003. (SCIE)
  • W. Cesario, D. Lyonnard, G. Nicolescu, Y. Paviot, L. Gauthier, S. Yoo, A. A. Jerraya, and M. Diaz-Nava, "Multiprocessor SoC Platforms: A Component-based Design Approach," IEEE Design & Test, Nov-Dec. 2002. (SCI)
  • L. Gauthier, S. Yoo, and A. A. Jerraya, "Automatic Generation and Targeting of Application Specific Operating Systems and Embedded Systems Software," IEEE Transactions on CAD, Nov. 2001. (SCI)
  • G. Nicolescu, K. Svarstad, W. Cesario, L. Gauthier, D. Lyonnard, S. Yoo, P. Coste and A. A. Jerraya, "Desiderata pour la specificationet la conception des systems electroniques," Technique et Science Informatiques, 2001-2002.
  • S. Yoo, K. Choi, and Dong S. Ha, "Performance Improvement of Geographically Distributed Cosimulation by Hierarchically Grouped Messages," IEEE Transactions on VLSI systems, vol. 8, no. 5, pp. 492-502, Oct. 2000. (SCIE)
  • S. Yoo and K. Choi, "Optimizing Timed Cosimulation by Hybrid Synchronization," Design Automation for Embedded Systems, Kluwer Academic Publishers, vol. 5, no. 2, pp. 129-152, June 2000. (SCIE)