In conjunction with ESWEEK 2017, Seoul, Korea

October 20, 2017

Venue: Sapphire Ballroom (3F, Lotte Hotel)

Breakfast and Lunch: Sapphire 1+2+3

Oral presentations: Sapphire 4

Poster: Sapphire Lobby

Call for Paper

The International Workshop on Highly Efficient Neural Networks Design is a forum for presentations of state-of-the-art research in highly efficient neural networks design. The workshop will combine both keynote/invited oral presentations and posters of the papers accepted from regular submissions. Embedded deep learning design contest (EDLDC) is held in conjunction with HENND workshop.

Keynote and oral presentations

Keynote by Prof. Yoshua Bengio (Univ. of Montreal) titled "Towards End-to-End Trainable Hardware"

and invited talks by experts from Baidu, NVIDIA, Samsung Electronics, SK Telecom, DeePhi, ETH Zurich, KAIST, POSTECH and UNIST.

Advance program of oral presentations (PDF) and slides are available now.

Poster paper submission

Algorithm optimization (e.g., faster R-CNN, YOLO v2, SSD, etc. for object detection)
Model compression (e.g., pruning, low rank approximation, etc.)
Deep learning framework (e.g., Caffe2 or TensorFlow framework for mobile and embedded systems)
On-device training (e.g., training neural networks on mobile devices like federated learning in Google)
CPU/DSP/GPU architecture enhancements for neural networks (e.g., matrix multiplication co-processor for neural network acceleration like Tensor Core in V100)
FPGA/ASIC accelerators for neural networks (e.g., zero-aware low precision CNN/RNN accelerator)

The papers should be no more than 4 pages in ACM format. All submissions will undergo double-blind reviews. We will hand out the accepted papers only at the workshop without an official proceedings. Thus, the accepted papers, if unpublished, can be submitted to other venues. In addition, accepted papers are invited to the submission to a special issue of SCI journal, Design Automation for Embedded Systems (DAEM), Springer.

List of accepted posters is available now.

Note that poster size is limited to maximum 1.5m x 1.5m.


For workshop registration, click here.


Yiran Chen, Duke University,

Sungjoo Yoo, Seoul National University,

Technical Program Committee (more members are being confirmed)

Yiran Chen (Duke University), Daehyun Kim (Google), Jaeyoun Kim (Facebook), Jian Ouyang (Baidu), Xuehai Qian (USC), Jongsoo Park (Intel), Minsoo Rhu (NVIDIA), Eunsoo Shim (Samsung Electronics), Yu Wang (Tsinghua), Dong Hyuk Woo (Google), Sungjoo Yoo (Seoul National University), Yuan Xie (UCSB).